发明名称 ERROR DETECTION AND CORRECTION IN A MEMORY WITH DIFFERENT ERRORRESISTANT BIT STATES
摘要 <p>To produce a memory which resists ion or photon attack, a memory structure is chosen whose memory point behaves asymmetrically with regard to these attacks. It is shown that in this case, it is sufficient to have a reference cell for an identical and periodic storage structure in order to be able to correct all the memory cells assailed by an attack. An error correction efficiency of ½ is thus obtained, with a simple redundancy, whereas the conventional methods make provision, for the same result, to triple the storage, to obtain a less beneficial efficiency of⅓.</p>
申请公布号 EP2289068(B1) 申请公布日期 2012.03.28
申请号 EP20090766089 申请日期 2009.06.18
申请人 EUROPEAN AERONAUTIC DEFENCE AND SPACE COMPANY EADS FRANCE;ASTRIUM SAS 发明人 MILLER, FLORENT;CARRIERE, THIERRY;BOUGEROL, ANTONIN
分类号 G11C5/00 主分类号 G11C5/00
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