发明名称 Inductor
摘要 Parasitic capacitance between upper and lower adjacent wirings of an inductor using a multilayer wiring layer in an insulating film formed on a base substrate is reduced. An inductor is characterized by having one go-around of go-around wiring (A-B or B-C) formed in each of at least two of adjacent wiring layers of a plurality of wiring layers 18 placed in an insulating film 17 on a base substrate 16, and in that one end (B) of the one go-around of go-around wiring (A-B and B-C) formed in each of the at least two of wiring layers is connected to each other at a via 2 and the one go-around of go-around wiring (A-B and B-C) formed in each of the at least two of wiring layers is placed at substantially the same position in a surface of the base substrate when viewed from an upper side of the base substrate.
申请公布号 US8143986(B2) 申请公布日期 2012.03.27
申请号 US20080523578 申请日期 2008.01.21
申请人 TANABE AKIRA;RENESAS ELECTRONICS CORPORATION 发明人 TANABE AKIRA
分类号 H01F5/00;H01F27/28 主分类号 H01F5/00
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