| 摘要 |
PURPOSE: A memory tester and a complier apparatus are provided to increase the preparation of a test program by making a test program which generates a linear and interleave burst address. CONSTITUTION: A first operation register(1) stores a first operation variable of one group. A second operation register(2) stores a second operation variable of the other group. A first selector(3) outputs the first and second operation variables as a burst address operation variable based on a selection signal. First and second burst address generating circuits generate a first or second burst address signal.
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