发明名称 MECHANISM FOR CONTROLLING POWER CONSUMPTION IN A PROCESSING NODE
摘要 <p>A system includes a plurality of processor cores and a power management unit. The power management unit may be configured to independently control the performance of the processor cores by selecting a respective thermal power limit for each of the plurality of processor cores dependent upon an operating state of each of the processor cores and a relative physical proximity of each processor core to each other processor core. In response to the power management unit detecting that a given processor core is operating above the respective thermal power limit, the power management unit may reduce the performance of the given processor core, and thereby reduce the power consumed by that core.</p>
申请公布号 WO2012036918(A1) 申请公布日期 2012.03.22
申请号 WO2011US50275 申请日期 2011.09.02
申请人 ADVANCED MICRO DEVICES, INC.;NAFFZIGER, SAMUEL, D. 发明人 NAFFZIGER, SAMUEL, D.
分类号 G06F1/32 主分类号 G06F1/32
代理机构 代理人
主权项
地址