| 摘要 |
According to one embodiment, a voltage output circuit is disclosed. The circuit has: a transistor connected between a first terminal and a second terminal, the transistor having a gate connected to a first node and being switched in accordance with control signal; a first pull-up circuit configured to pull-up the first node voltage when the control signal is first level; a pull-down circuit configured to pull-down the first node voltage when the control signal is second level; a monitor configured to cause a second node voltage to be second level when a difference between the input voltage and the first node voltage is larger than a reference voltage; and a second pull-up circuit configured to pull-up the first node voltage when the control signal is first level and also the second node voltage is second level. |
