发明名称 CIRCUIT DEVICE, FREQUENCY ALTERING CIRCUIT, METHOD FOR TESTING CIRCUIT DEVICE, AND METHOD FOR CONTROLLING FREQUENCY ALTERING CIRCUIT
摘要 <p>The present invention addresses the problem of providing a circuit device that reduces test time by means of causing the frequency of a BIST clock signal to be variable. The circuit device has: a clock generating unit that outputs a clock at a first frequency; a plurality of phase control units to which the clock at the first frequency that the clock generating unit outputs is input, and that each output the clock at the first frequency at an advanced or delayed phase with respect to the phase of the clock at the first frequency; a selection unit to which the plurality of clocks at the first frequency each output by the plurality of phase control units are input, and that sequentially select the pulse of the plurality of clocks at the first frequency, outputting a clock at a second frequency; a pattern generating unit that generates a test pattern on the basis of the clock at the second frequency output by the selection unit; and a circuit unit to which the test pattern generated by the pattern generating unit and the clock at the second frequency output by the selection unit are input, and that outputs an operation result of having operated with the test pattern as the input on the basis of the clock at the second frequency.</p>
申请公布号 WO2012035651(A1) 申请公布日期 2012.03.22
申请号 WO2010JP66184 申请日期 2010.09.17
申请人 FUJITSU LIMITED;KONO, TAKESHI 发明人 KONO, TAKESHI
分类号 G01R31/28;H01L21/66 主分类号 G01R31/28
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