发明名称 CIRCUIT AND METHOD FOR DATA RETENTION AT LOW VOLTAGE
摘要 PURPOSE: A low voltage data retention method and a circuit thereof are provided to compare voltage of a supplied power source and reference voltage when a chip is turned off, thereby determining a turn on/off state of power-loss modules. CONSTITUTION: A reference voltage generating circuit generates reference voltage. A voltage detection circuit detects voltage of a supplied power source. A comparator circuit compares the voltage detected by the voltage detection circuit and the reference voltage. The comparator circuit generates a turn-off signal which deactivates power consumption modules of an integrated chip when the detected voltage is lower than the reference voltage.
申请公布号 KR20120028213(A) 申请公布日期 2012.03.22
申请号 KR20110073037 申请日期 2011.07.22
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 WANG YING;CHUNG, HWI TAEK
分类号 G11C5/14;G11C7/24 主分类号 G11C5/14
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