发明名称 Power Management of Components Having Clock Processing Circuits
摘要 A method and system for managing power consumption of a component that employs a clock processing circuit to produce a processed clock signal used by the component from a clock signal supplied to the clock processing circuit. A frequency of a clock signal supplied to the clock processing circuit is changed based on operating characteristics of a voltage regulator module (VRM) or power supply unit so as to maintain acceptable operating parameters of the power supply unit during a change in frequency of a clock signal.
申请公布号 US2012072756(A1) 申请公布日期 2012.03.22
申请号 US201113294327 申请日期 2011.11.11
申请人 ALLEN DANIEL J.;ALTERA CORPORATION 发明人 ALLEN DANIEL J.
分类号 G06F1/26;G06F1/04;G06F11/30 主分类号 G06F1/26
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