发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of preventing a writing error and a reading error while achieving further downscaling of the device. <P>SOLUTION: A semiconductor memory device comprises a cell array constituted by memory cell strings, a plurality of voltage generation circuits disposed in a lower part of the cell array and a control circuit for controlling the voltage generation circuits, in which the plurality of memory cell strings each include: a semiconductor layer having a pair of columnar portions, and a connection portion formed so as to connect lower ends of the pair of columnar portions; a plurality of control gates perpendicular to the columnar portions; and a plurality of memory cell transistors formed in respective crossing portions between the columnar portions and the plurality of control gates, and during a writing operation and a reading operation, out of the plurality of voltage generation circuits, the control circuit does not allow the voltage generation circuit to be driven, which gives noise to the memory string to be written and read of the plurality of memory strings, and allows the voltage generation circuit to be driven, which does not give noise to the memory string to be written and read of the plurality of memory strings. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012059830(A) 申请公布日期 2012.03.22
申请号 JP20100200040 申请日期 2010.09.07
申请人 TOSHIBA CORP 发明人 OGIWARA TAKASHI;IWAI HITOSHI;ITAGAKI SEITARO
分类号 H01L27/115;G11C16/04;G11C16/06;H01L21/8247;H01L27/10;H01L29/788;H01L29/792 主分类号 H01L27/115
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