发明名称 METHOD FOR MANUFACTURING STACK PACKAGE
摘要 <p>PURPOSE: A method for manufacturing a stack package is provided to prevent cracks on the boundary surface between a chip and a molding material, thereby increasing reliability between the molding material and a pre-package molding material. CONSTITUTION: A semiconductor chip(200) is stacked on an interposer wafer to electrically connect a through silicon via with a through electrode of a semiconductor electrode. The semiconductor chip and the interposer wafer are molded by a molding material. The thickness of the molding material is reduced by eliminating an upper part of the molding material. The upper part of the molding material is etched to expose all or a portion of an upper part of the semiconductor chip.</p>
申请公布号 KR20120027807(A) 申请公布日期 2012.03.22
申请号 KR20100089596 申请日期 2010.09.13
申请人 HYNIX SEMICONDUCTOR INC. 发明人 HAN, KWON WHAN
分类号 H01L23/28;H01L21/78;H01L23/12 主分类号 H01L23/28
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