发明名称 STATIC RANDOM ACCESS MEMORY (SRAM) HAVING BIT CELLS ACCESSIBLE BY SEPARATE READ AND WRITE PATHS
摘要 A method is for reading a first bit cell of a static random access memory in which the static random access memory has a first plurality of bit cells including the first bit cell. Each bit cell of the first plurality of bit cells includes a cross coupled pair of inverters for storing a logic state, optimized for being written, and powered by a read voltage during a read of the first plurality of bit cells. Each bit cell of the first plurality of bit cells is coupled to a true read bit line and a true write bit line, and a second plurality of bit cells is coupled to a complementary read bit line and a complementary write bit line. The true and complementary read bit lines are precharged to a precharge voltage of about half the read voltage. The true read bit line is predisposed to a logic low condition. One of a group consisting of a high impedance from the first bit cell to indicate that the logic state is a logic low and a signal voltage greater than the intermediate voltage to indicate that the logic state is a logic high is output from the first bit cell to the true read bit line.
申请公布号 US2012069636(A1) 申请公布日期 2012.03.22
申请号 US20100883275 申请日期 2010.09.16
申请人 PELLEY PERRY H.;RAMARAJU RAVINDRARAJ 发明人 PELLEY PERRY H.;RAMARAJU RAVINDRARAJ
分类号 G11C11/00;G11C7/00 主分类号 G11C11/00
代理机构 代理人
主权项
地址