| 摘要 |
A semiconductor device includes a substrate including a cell area and a sense amplifier area, a first bit line connected to a bit line contact of the cell area and a first contact of the sense amplifier area, and a second bit line located on the first bit line to overlap with the first bit line on a plan view and connected to a second contact of the sense amplifier area. The semiconductor device applies a folded bit line structure to a 6F2 structure so as to promote competitiveness of a net die, resulting in reduction of production costs. The semiconductor device implements various test patterns for defect analysis, wherein a conventional 6F2-layout open bit line has difficulty in using the test patterns, resulting in an increased production yield. The semiconductor device reduces noise of a sense amplifier, and performs mat-basis repairing, resulting in an increased production yield. |
