发明名称 High signal level compliant input/output circuits
摘要 A signal driver for an interface circuit has a first stage level shifter to accept input signals and output signals at a first signal level. The signal driver also has a second stage level shifter coupled to the first stage level shifter to output signals at a second signal level. Electronic components of the first and second stage level shifter have reliability limits less than the second signal level. The first and second stage configurations of the first stage level shifter and the second stage level shifter prevents exposing the electronic components to terminal to terminal signal levels higher than the reliability limits when processing signals for output at the second signal level.
申请公布号 US8138814(B2) 申请公布日期 2012.03.20
申请号 US20080181655 申请日期 2008.07.29
申请人 SHANKAR VIJAY;GUPTA ABHEEK;SRINIVAS VAISHNAV;MOHAN VIVEK;QUALCOMM INCORPORATED 发明人 SHANKAR VIJAY;GUPTA ABHEEK;SRINIVAS VAISHNAV;MOHAN VIVEK
分类号 H03L5/00 主分类号 H03L5/00
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