发明名称 |
Latency measurements for wireless communications |
摘要 |
In one embodiment, a programmable logic device (PLD) includes a programmable fabric and hard logic coupled to the programmable fabric. The hard logic includes a timing measurement circuit adapted to measure latency of a data path between first and second points in the programmable logic device, such as the latency of a data path through a link interface configured within the programmable fabric. |
申请公布号 |
US8138790(B1) |
申请公布日期 |
2012.03.20 |
申请号 |
US201113083889 |
申请日期 |
2011.04.11 |
申请人 |
DOUBLER JAMES;HAMMER MICHAEL;ZHANG JIN;LATTICE SEMICONDUCTOR CORPORATION |
发明人 |
DOUBLER JAMES;HAMMER MICHAEL;ZHANG JIN |
分类号 |
H03K19/177 |
主分类号 |
H03K19/177 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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