发明名称 |
LAYOUT OF THE SEMICONDUCTOR DEVICE |
摘要 |
PURPOSE: A layout of a semiconductor device is provided to seclude bit line free charge voltage by cutting off a dummy bit line on the layout and to improve yield and quality of the semiconductor device. CONSTITUTION: A bit line is arranged on a cell region. A dummy bit line(130) is arranged on a dummy region. The dummy region is formed in the outside of the cell region. The dummy bit line comprises a plurality of dummy bit line patterns(130a). The dummy bit line is connected to bit line free charge voltage. The plurality of dummy bit line patterns is separated at constant intervals. The distance between dummy bit line patterns is 40-80nm.
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申请公布号 |
KR20120025762(A) |
申请公布日期 |
2012.03.16 |
申请号 |
KR20100087854 |
申请日期 |
2010.09.08 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
CHOI, YONG JIN;KIM, DOC JIN |
分类号 |
H01L27/04 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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