发明名称 METHOD FOR FORMING CONDUCTIVE VIA IN A SUBSTRATE
摘要 The steps of the present invention are as follows: (a) a detachable film is formed on both sides of a substrate, respectively; (b) a number of vias running through both sides of the detachable films are formed in the substrate; (c) the vias are filled with a conductive paste; (d) the detachable films are peeled off; (e) a metallic conductive layer is deposited on both sides of the substrate, respectively; (f) a specific mold pattern is formed on the metallic conductive layers, respectively, by a photolithographic process; (g) a metallic circuit layout layer is formed on the patterns, respectively, by an electrochemical process; and (h) the mold patterns and the metallic conductive layers are removed. As such, the substrate is not contaminated by the conductive paste. Further, by using deposition, metallic conductive layers are directly adhered to the substrate and, by using photolithography, layouts with small linewidth could be formed.
申请公布号 US2012064230(A1) 申请公布日期 2012.03.15
申请号 US20100880168 申请日期 2010.09.13
申请人 WEI SHIH-LONG;HSIAO SHENG-LI;HO CHIEN-HUNG;LIU HSIAO-CHUN 发明人 WEI SHIH-LONG;HSIAO SHENG-LI;HO CHIEN-HUNG;LIU HSIAO-CHUN
分类号 B05D5/12;C25D5/02 主分类号 B05D5/12
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