发明名称 |
SYNCHRONIZATION BETWEEN TRANSLATION LOOK-ASIDE BUFFER AND EXTENSION PAGING TABLE |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a technique capable of performing efficient address conversion in a virtual machine. <P>SOLUTION: A processor 318 includes logic 322 for executing an instruction for synchronizing mapping stored in a translation look-aside buffer (TLB) 323 from system guest physical address (guest physical address) based on virtualization up to system host physical address (host physical address) based on virtualization with corresponding mapping stored in a system extension paging table (EPT) 328 based on virtualization. <P>COPYRIGHT: (C)2012,JPO&INPIT |
申请公布号 |
JP2012053888(A) |
申请公布日期 |
2012.03.15 |
申请号 |
JP20110222052 |
申请日期 |
2011.10.06 |
申请人 |
INTEL CORP |
发明人 |
BENNETT STEVEN M;ANDREW V ANDERSON;NEIGER GILBERT;ULRICH RICHARD;RODGERS DION;MADUKKARUMUKUMANA RAJESH;RUST CAMRON;SEBASTIAN SCHOENBERG |
分类号 |
G06F12/10 |
主分类号 |
G06F12/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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