发明名称 Self-Calibrating Relaxation Oscillator Based Clock Cycle
摘要 A technique and corresponding circuitry are presented for a process independent, self-calibrating relaxation based clock source. The technique and circuitry presented here can reduce the time and cost needed for calibration significantly. The relaxation based clock source produces a clock signal whose frequency is dependent upon a trim value. Starting from an initial trim value, the clock signal is generated, its frequency is compared with a reference clock frequency value, and the trim value is correspondingly adjusted up or down a bit at a time. After this process has continued for a while, min-max logic is used to determine the maximum and minimum trim values and, based on these, the final trim value for the clock is set. This calibration process can also be used to extract whether, and by how much, the implementation on silicon of a particular chip lies in the fast or slow process corners.
申请公布号 US2012062326(A1) 申请公布日期 2012.03.15
申请号 US201113300808 申请日期 2011.11.21
申请人 PANCHOLI DEEPAK;ODEDARA BHAVIN;PRASAD NAIDU;BOJJA SRIKANTH;SABBINENI SRINIVASA RAO;NARADASI JAYAPRAKASH 发明人 PANCHOLI DEEPAK;ODEDARA BHAVIN;PRASAD NAIDU;BOJJA SRIKANTH;SABBINENI SRINIVASA RAO;NARADASI JAYAPRAKASH
分类号 H03L7/00 主分类号 H03L7/00
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