发明名称 GAME MACHINE
摘要 <P>PROBLEM TO BE SOLVED: To provide a game machine having simple device configuration even when detection signals are increased. <P>SOLUTION: A board 33 for transmitting switch signals receives a plurality of switch signals and includes a plurality of shift resisters 50a-50c connected in series. The shift resisters 50a -50c acquire and maintain the switch signals corresponding to latch signals LT and output the switch signals synchronized with a clock signal. A performance control part 22 connected to them through a serial connection line outputs an operation start signal at every predetermined time. The performance control part includes first processing (ST79) for acquiring the switch signal input to the individual shift resisters 50 at this time, second processing (ST81) for outputting the predetermined number of clock signals in the form of serial signals, and third processing (ST83) for acquiring the switch signals which are output from the shift resisters bit by bit corresponding to the clock signals. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012050806(A) 申请公布日期 2012.03.15
申请号 JP20110133962 申请日期 2011.06.16
申请人 FUJISHOJI CO LTD 发明人 SAKAI RYOTA;OKAWA TAKASHI
分类号 A63F7/02 主分类号 A63F7/02
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