| 摘要 |
<p>Any one of multiple memory banks and storage locations therein are selected in response to a first address and a second address respectively. The first address is formed in either of two registers, one of which is selected in response to a bank select signal. In response to an interrupt condition, either or both of the registers are enabled to address preselected ones of the memory banks. Further means are provided to restore either or both of the registers to their contents prior to the interrupt condition.</p> |
