发明名称 Processing apparatus with memories coupled to respective processors
摘要 In a processing apparatus, a plurality of processors which perform different kinds of processing is integrated on a first semiconductor substrate. A plurality of memories to be managed by the plurality of processors integrated on the first semiconductor substrate is integrated on a second semiconductor substrate. The plurality of processors integrated on the first semiconductor substrate includes respective separate memory controllers which control the memories to be managed that are integrated on the second semiconductor substrate. The semiconductor substrates are manufactured using different semiconductor manufacturing processes, and micro bumps are formed on their respective surfaces. The semiconductor substrates are stacked together in the thickness direction, and are connected to each other through the micro bumps.
申请公布号 US8134226(B2) 申请公布日期 2012.03.13
申请号 US20070728542 申请日期 2007.03.26
申请人 HIROI TOSHIYUKI;SUGAWARA AKIHIKO;SONY COMPUTER ENTERTAINMENT INC. 发明人 HIROI TOSHIYUKI;SUGAWARA AKIHIKO
分类号 H01L23/02 主分类号 H01L23/02
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