发明名称 ERROR CONTROL SYSTEM
摘要 PURPOSE:To secure an effective error correction as a whole and thus to insure the sufficiently high quality of the digital information by dividing the digital information into several bit groups and then applying the error control code to each bit group. CONSTITUTION:The analog signal is converted into the natural binary of, for example, 10 bits through A/D converter 11. Then the 5 bits of the higher importance of the digital signal are supplied to error detection code additional circuit 12 with addition of the error control code of, for example, 2 bits featuring a large control capacity. In the same way, the 5 bits of the lower importance of the digital signal are supplied to circuit 13 to be added with the simple error control code of, for example, 1 bit. These signals are transmitted through transmission line 2, and then the error is detected through error detection circuits 32 and 33.
申请公布号 JPS556961(A) 申请公布日期 1980.01.18
申请号 JP19780079462 申请日期 1978.06.30
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 TAKEUCHI KEIJI;KAGEYAMA SEISHI;KATOU MASAAKI
分类号 G06F11/10;G11B20/18;H03M13/00;H04L1/00 主分类号 G06F11/10
代理机构 代理人
主权项
地址
您可能感兴趣的专利