发明名称 |
Method for semiconductor gate hardmask removal and decoupling of implants |
摘要 |
A method is provided for fabricating a semiconductor device having implanted source/drain regions and a gate region, the gate region having been masked by the gate hardmask during source/drain implantation, the gate region having a polysilicon gate layered on a metal layered on a high-K dielectric layer. The gate region and the source/drain regions may be covered with a self planarizing spin on film. The film may be blanket etched back to uncover the gate hardmask while maintaining an etched back self planarizing spin on film on the implanted source/drain regions. The gate hardmask may be etched back while the etched back film remains in place to protect the implanted source/drain regions. The gate region may be low energy implanted to lower sheet resistance of the polysilicon layer. The etched back film may be then removed. |
申请公布号 |
US8133746(B2) |
申请公布日期 |
2012.03.13 |
申请号 |
US20100714702 |
申请日期 |
2010.03.01 |
申请人 |
KANAKASABAPATHY SIVANANDA;JAGANNATHAN HEMANTH;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
KANAKASABAPATHY SIVANANDA;JAGANNATHAN HEMANTH |
分类号 |
H01L21/00;H01L21/336 |
主分类号 |
H01L21/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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