发明名称 SEMICONDUCTOR PACKAGE AND STACKED SEMICONDUCTOR PACKAGE HAVING THE SAME
摘要 A stacked semiconductor package is provided to reduce a thickness and to improve electrical characteristics by connecting directly bumps of stacked semiconductor chips to each other. A chip mounting member includes external connection terminals. A base semiconductor chip(100) is attached on an upper surface of the chip mounting member and includes a plurality of first penetrating type pads. One or more stacked semiconductor chip(200) is stacked on an upper surface of the base semiconductor chip and includes a plurality of second penetrating type pads. A plurality of bumps(300) are arranged between the base semiconductor chip and the stacked semiconductor chip and between the stacked semiconductor chips in order to support the stacked semiconductor chips. A wire(310) is formed to connect electrically the second penetrating type pads with the external connection terminals. A sealing part(320) is formed to cover and protect the base, the stacked semiconductor chip, the wire, and a part of the external connection terminals.
申请公布号 KR101123797(B1) 申请公布日期 2012.03.12
申请号 KR20060096645 申请日期 2006.09.29
申请人 发明人
分类号 H01L23/12 主分类号 H01L23/12
代理机构 代理人
主权项
地址