发明名称 |
PACKAGING STRUCTURE OF SEMICONDUCTOR CHIP AND METHOD OF MANUFACTURING THE SAME |
摘要 |
PURPOSE: A semiconductor chip packaging structure and a manufacturing method thereof are provided to increase a bonding area with soldering by arranging a partition wall in a pad area of a substrate. CONSTITUTION: A core layer(A) including a via hole(120) is formed. A solder resist consisting of copper foils(130a,130b) and a thermosetting material is spread on an upper and lower side of a core layer. An area coated with the solder resist is opened and a via open area is formed. A chemical copper is formed on the upper and lower side of the core layer and the upper side of the via open area. The solder resist and the chemical copper are etched and a barrier wall part(140) is formed.
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申请公布号 |
KR20120022458(A) |
申请公布日期 |
2012.03.12 |
申请号 |
KR20100086064 |
申请日期 |
2010.09.02 |
申请人 |
SAMSUNG ELECTRO-MECHANICS CO., LTD. |
发明人 |
PARK, JEONG WOO |
分类号 |
H01L21/60 |
主分类号 |
H01L21/60 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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