发明名称 Method for fabricating e.g. triple silicon-on-insulator structure used for forming resonant tunneling diode, involves implementing partial dissolution of buried electrically insulating layer farthest from substrate for thinning down layer
摘要 The method involves implementing partial dissolution of a buried electrically insulating layer (2a) e.g. silicon dioxide layer, farthest from a carrier substrate (1) of semiconductor-on-insulator structure (10) for thinning down the layer till thickness of the layer is less than 10 nm, where the substrate supports the layer and another buried electrically insulating layer (2b). The partial dissolution is implemented by furnace annealing under argon atmosphere, where the layers are superimposed alternately with semiconductor layers (3a, 3b) e.g. amorphous/single-crystal silicon layers.
申请公布号 FR2964495(A1) 申请公布日期 2012.03.09
申请号 FR20100056984 申请日期 2010.09.02
申请人 S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES 发明人 KONONCHUK OLEG;LANDRU DIDIER
分类号 H01L21/762;H01L21/324 主分类号 H01L21/762
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