CIRCUIT AND METHOD FOR DELAYING INTERNAL WRITE SIGNAL OF MEMORY DEVICE

摘要

PURPOSE: An internal write signal delay circuit of a memory apparatus and a delay method thereof are provided to activate an internal clock during a write latency time from a time point when a write signal is activated by a column address strobe signal, thereby reducing unnecessary power consumption of the memory apparatus. CONSTITUTION: A latency controller(401) generates a latency signal by delaying a write signal activated by a column address strobe signal for a write latency time. An internal clock generation part(403) activates an internal clock from an activation time point of the write signal to an activation time point of the latency signal. A delay output part(405) outputs a delayed internal write signal which is activated by the write signal by being synchronized to the internal clock.