发明名称 |
SHIFT REGISTER, AND DISPLAY DEVICE |
摘要 |
A unit circuit (11) configuring a shift register is provided with: transistor (T2) the drain terminal of which is applied with a clock signal (CK) and the source terminal of said transistor (T2) is connected to an output terminal (OUT); transistor (T9) for outputting an on voltage to the output terminal (OUT) when applied with an active all-on control signal (AON) and for stopping the output of the aforementioned on voltage when applied with a non-active all-on control signal (AONB); transistor (T1) for applying an on voltage to the control terminal of transistor (T2) on the basis of an input signal (IN) when applied with the non-active all-on control signal (AONB); and transistor (T4) for applying an off voltage to the control terminal of transistor (T2) when applied with the active all-on control signal (AON). As a consequence, it is possible to provide, with a simple configuration, a shift register capable of preventing malfunctions after an all-on operation is performed, and a display device equipped with the aforementioned shift register. |
申请公布号 |
WO2012029799(A1) |
申请公布日期 |
2012.03.08 |
申请号 |
WO2011JP69635 |
申请日期 |
2011.08.30 |
申请人 |
SHARP KABUSHIKI KAISHA;OHKAWA, HIROYUKI;SASAKI, YASUSHI;MURAKAMI, YUHICHIROH;YAMAMOTO, ETSUO |
发明人 |
OHKAWA, HIROYUKI;SASAKI, YASUSHI;MURAKAMI, YUHICHIROH;YAMAMOTO, ETSUO |
分类号 |
G11C19/28;G09G3/20;G09G3/36;G11C19/00 |
主分类号 |
G11C19/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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