| 摘要 |
PURPOSE:To realize improvement in latch-up resistance characteristic and high integration density by providing a high concentration impurity layer and opposing impurity layer in both sides of epitaxial growth layer and forming island regions by heated diffusion. CONSTITUTION:A P type high concentration impurity layer 22 is formed on the predetermined P-well forming region of an N type Si substrate 21. Next, an N type epitaxial growth layer 23 is formed on the substrate 21. Next, an opposing P type impurity layer 26 is formed on the upper layer 23 of layer 22. Next, impurity of layer 22 is up-diffused by the heat processing, while impurity of layer 26 is down-diffused. The P-well can be formed by joining said impurity layers. Next, the P-channel MOSFET is formed in the right half region of the substrate 1, while the N-channel MOSFET in the well 27 in order to form the C-MOSFET. According to this manufacturing method, the well 27, which has distribution of impurity wherein impurity concentration increases suddenly in the depth direction, can be obtained easily. Thereby, excellent latch-up resistance characteristic can be obtained. Moreover, high integration density can be realized because well 27 can be formed without remarkable lateral diffusion of impurity. |
