发明名称 |
System and method for simulating a semiconductor wafer prober and a class memory test handler |
摘要 |
A method runs a simulation. The method comprises receiving a selection of a device. The device is one of a prober used in wafer testing and a handler used in package testing. The method comprises receiving at least one parameter for a set of parameters for the simulation. The method comprises running the simulation by executing commands to be performed as if the device were present. A controller supplies the set of commands. Results from the simulation indicate a performance of the controller. |
申请公布号 |
US8131531(B2) |
申请公布日期 |
2012.03.06 |
申请号 |
US20070998481 |
申请日期 |
2007.11.30 |
申请人 |
GOLDSMITH LARRY IRA;VERIGY (SINGAPORE) PTE. LTD. |
发明人 |
GOLDSMITH LARRY IRA |
分类号 |
G06F9/44;G06F13/10;G06F13/12 |
主分类号 |
G06F9/44 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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