| 摘要 |
<P>PROBLEM TO BE SOLVED: To improve a writing speed while increasing storage capacity by suppressing influence of capacity coupling to reduce interference of an adjacent memory cell in a NAND type flash memory. <P>SOLUTION: A nonvolatile semiconductor memory device comprises a plurality of word lines 130, a plurality of bit lines 140 and a plurality of memory cell arrays 100 having a plurality of memory cell transistors 112 having two or more numbers of storage statuses. The numbers of storage statuses stored in the memory cell transistors 112 differ by memory cell transistors 112 which are adjacent each other in a word line direction and a bit line direction. Writing is performed by each even number bit line 140 and odd number bit line 140 in the page unit. The potential of the bit line 140 to which writing is not performed during writing is controlled at a predetermined potential. <P>COPYRIGHT: (C)2012,JPO&INPIT |
