发明名称 PHASE SYNCHRONIZATION CIRCUIT AND RADIO COMMUNICATION DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a phase synchronization circuit and a radio communication device which can eradicate a frequency correction error, keep a voltage-to-frequency conversion gain Kvco low, and relax PLL phase noise design. <P>SOLUTION: Calibration unit 190 includes: a counter circuit 191 for counting the frequency of an output oscillation signal of a voltage-controlled oscillator 184; first and second storage circuits 193, 194 for holding the count result of the counter circuit; a comparison circuit 195 for determining which is larger or smaller by comparing the counter circuit with a target frequency; a control circuit 106 for controlling the capacitor bank of the voltage-controlled oscillator comparing the count result of the counter circuit with the result held by the first storage circuit in response to the result of the comparison circuit; a voltage generation circuit 197 for generating calibration voltage and supplies it to the voltage-controlled oscillator; and a processing circuit 198 for performing calculation according to the count result of the counter circuit and the results of the first and second storage circuits, and according to the calculation result, for controlling the voltage generation circuit. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012044274(A) 申请公布日期 2012.03.01
申请号 JP20100181247 申请日期 2010.08.13
申请人 SONY CORP 发明人 FUJIWARA TETSUYA;HARADA SHINGO
分类号 H03L7/099 主分类号 H03L7/099
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