DATA PROCESSING DEVICE AND DATA PROCESSING SYSTEM

摘要

In the present invention, a main clock circuit (26) supplies a first clock to a central processing unit (CPU) and a non-volatile memory (23). The central processing unit (CPU), according to a user program, sets which one of a high-speed operational mode, a wide voltage range operational mode, and a low power consumption operational mode to operate in for a data processing device. The high-speed operational mode is a mode in which an external supply voltage can operate within a first range which is a relatively high-voltage range. The wide voltage range operational mode is a mode in which the external supply voltage can operate within a second range which includes the first range and also includes down to a relatively low-voltage range, wherein the upper bound of frequencies of the first clock in the second mode is lower than the upper bound of frequencies of the first clock in the first mode. The frequencies of the first clock in the low power consumption operational mode are lower than both the frequencies of the first clock in the high-speed operational mode and the frequencies of the first clock in the wide voltage range operational mode.