| 摘要 |
According to one embodiment, there is provided a host controller, which samples reception data in a VDS mode and an FDS mode, includes a VDS phase register which holds a phase shift amount in the VDS mode, an FDS phase register which holds a phase shift amount in the FDS mode, a mode setting unit configured to indicate in which of the VDS mode and the FDS mode data is sampled, a sampling position setting unit which selects the phase shift amount set in one of the VDS and the FDS phase register in accordance with a setting value of the mode setting unit, and provides the selected phase shift amount as a sampling position, and a clock phase shift unit which shifts a phase of an input clock signal in accordance with the shift amount, and provides the shifted input clock signal as a sampling clock. |
