发明名称 Semiconductor memory for storing several bits at same address - has comparator circuits for determining concordance of data from cell blocks and data at terminal
摘要 The semiconductor memory (30) reduces the testing time in addition to storing numerous bits at the same address. It has comparison circuits between a number of memory cell blocks (42a-d). From the latter, data are read-out at the same address. It uses an input/output terminal (62) for data read-out and writing in normal operation. The comparison circuits pick-up coincidence, or non-coincidence of the data from the memory cell blocks and the terminal. Pref. a logic (60) overrides the outputs of the comparison circuits. It transmits a fault indicator signal via a non-coupled output (64). ADVANTAGE - For simple semiconductor memory testing, with reduced testing time, and fewer terminal connections.
申请公布号 DE4328605(A1) 申请公布日期 1994.03.03
申请号 DE19934328605 申请日期 1993.08.25
申请人 MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP 发明人 FUDEYASU, YOSHIO, ITAMI, HYOGO, JP
分类号 G11C29/00;G11C29/12;G11C29/14;G11C29/28;(IPC1-7):G11C29/00 主分类号 G11C29/00
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