发明名称 |
Vertically packaged MOSFET and IC power devices as integrated module using 3D interconnected laminates |
摘要 |
An electronic package for containing at least a top packaging module vertically stacked on a bottom packaging module. Each of the packaging modules includes a semiconductor chip packaged and connected by via connectors and connectors disposed on a laminated board fabricated with a standard printed-circuit board process wherein the top and bottom packaging module further configured as a surface mountable modules for conveniently stacking and mounting to prearranged electrical contacts without using a leadframe. At least one of the top and bottom packaging modules is a multi-chip module (MCM) containing at least two semiconductor chips. At least one of the top and bottom packaging modules includes a ball grid array (BGA) for surface mounting onto the prearranged electrical contacts. At least one of the top and bottom packaging modules includes a plurality of solder bumps on one of the semiconductor chips for surface mounting onto the prearranged electrical contacts. The laminated board of the bottom packaging modules further has a thermal expansion coefficient substantially the same as a printed circuit board (PCB) whereby a surface mount onto the PCB is less impacted by a temperature change.
|
申请公布号 |
US8124453(B2) |
申请公布日期 |
2012.02.28 |
申请号 |
US20100927172 |
申请日期 |
2010.11.08 |
申请人 |
ALPHA & OMEGA SEMICONDUCTOR, LTD |
发明人 |
SUN MING;HO YUEH SE |
分类号 |
H01L23/02 |
主分类号 |
H01L23/02 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|