Test access port controller with a gate for controlling a shift data register signal

摘要

When a test access port (TAP) controller based on the U.S. standard IEEE 1149.1 is used, a gate is provided for controlling the signal output of its shift register so as to turn high when it is in the normal condition to control the selector signal so that, during the normal operation, the input terminal is set disable at the selector circuit within the boundary scan register cell. As a result, it can be completely prevented that the penetrating current, which can be induced when the input selector signal is on the intermediate level of potential, be induced within the selector circuit or DFF circuit within the boundary scan register.