发明名称 DIGITAL SIGNAL CODING APPARATUS, DIGITAL SIGNAL DECODING APPARATUS, DIGITAL SIGNAL ARITHMETIC CODING METHOD AND DIGITAL SIGNAL ARITHMETIC DECODING METHOD
摘要 <p>DIGITAL SIGNAL CODING APPARATUS, DIGITAL SIGNAL DECODINGAPPARATUS, DIGITAL SIGNAL ARITHMETIC CODING METHOD ANDDIGITAL SIGNAL ARITHMETIC DECODING METHODIn a bit stream syntax containing compressedvideo slice data for compressed video data of aslice structure, a slice header for compressedvideo slice data has attached thereto a slice startcode, a register reset flag indicating whether aregister value, which designates a status of acodeword occurring in an arithmetic coding process,should be reset in the next transmission unit, aninitial register value which indicates a registervalue to be used to start arithmeticcoding/decoding to build/decompose the nexttransmission unit, only when the register resetflag indicates that the register-should not bereset.Fig. 3</p>
申请公布号 SG177782(A1) 申请公布日期 2012.02.28
申请号 SG20100049658 申请日期 2003.04.10
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 SHUNICHI SEKIGUCHI;YOSHIHISA YAMADA;KOHTARO ASAI
分类号 G06T9/00;H03M7/40;H04N7/24;H04N7/52;H04N19/00;H04N19/105;H04N19/13;H04N19/174;H04N19/46;H04N19/51;H04N19/625;H04N19/70;H04N19/91 主分类号 G06T9/00
代理机构 代理人
主权项
地址