发明名称 Diffusing impurity ions into pillars to form vertical transistors
摘要 A method for manufacturing a semiconductor device that includes forming a pillar pattern including a sidewall contact over a semiconductor substrate; forming a silicon layer in a lower portion disposed between the pillar patterns; implanting ions into the silicon layer; diffusing the implanted impurity ions into the inside of the pillar pattern to form an ion-implanting region; removing the silicon layer; and burying a conductive material in the lower portion disposed between the pillar patterns. The method can prevent a floating body effect by adding a process of a vertical channel transistor.
申请公布号 US8124479(B2) 申请公布日期 2012.02.28
申请号 US20100947087 申请日期 2010.11.16
申请人 JANG TAE SU;HYNIX SEMICONDUCTOR INC. 发明人 JANG TAE SU
分类号 H01L21/336;H01L21/425 主分类号 H01L21/336
代理机构 代理人
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