发明名称 |
MOS transistor with gate trench adjacent to drain extension field insulation |
摘要 |
An integrated circuit containing an MOS transistor with a trenched gate abutting an isolation dielectric layer over a drift region. The body well and source diffused region overlap the bottom surface of the gate trench. An integrated circuit containing an MOS transistor with a first trenched gate abutting an isolation dielectric layer over a drift region, and a second trenched gate located over a heavily doped buried layer. The buried layer is the same conductivity type as the drift region. A process of forming an integrated circuit containing an MOS transistor, which includes an isolation dielectric layer over a drift region of a drain of the transistor, and a gate formed in a gate trench which abuts the isolation dielectric layer. The gate trench is formed by removing substrate material adjacent to the isolation dielectric layer. |
申请公布号 |
US8124482(B2) |
申请公布日期 |
2012.02.28 |
申请号 |
US201113006589 |
申请日期 |
2011.01.14 |
申请人 |
DENISON MARIE;PENDHARKAR SAMEER;HU BINGHUA;EFLAND TAYLOR RICE;SEETHARAMAN SRIDHAR;TEXAS INSTRUMENTS INCORPORATED |
发明人 |
DENISON MARIE;PENDHARKAR SAMEER;HU BINGHUA;EFLAND TAYLOR RICE;SEETHARAMAN SRIDHAR |
分类号 |
H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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