发明名称 |
Image processing circuit and method thereof |
摘要 |
An image processing circuit generating a frame according to a plurality of fields including at least first, second and third fields, comprises a memory unit and a de-interlacing unit. The memory unit stores the first and second fields. The de-interlacing unit receives the third field, and reads the first and second fields from the memory to generate a de-interlaced frame accordingly. |
申请公布号 |
US8125565(B2) |
申请公布日期 |
2012.02.28 |
申请号 |
US20080339909 |
申请日期 |
2008.12.19 |
申请人 |
CHEN CHUNG-YI;JEN LI-HUAN;MSTAR SEMICONDUCTOR, INC. |
发明人 |
CHEN CHUNG-YI;JEN LI-HUAN |
分类号 |
H04N7/01 |
主分类号 |
H04N7/01 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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