REDUNDANCY CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE

摘要

The circuit reduces the fuse cutting time and improves the productivity by protection of DC defection. The circuit includes a memory cell array which has the static cell on the cross area between word lines, the redundancy cell array which has the static cell on the cross area between bit line pairs. The cell voltage supplying circuit which supplies action voltage to the static cell. The free charge means charges the bit line pairs to the specified level. The DC redundancy safety circuit prevents the cell voltage supply and bit line free charge operation.