发明名称 Voltage generation circuit and semiconductor memory using the same
摘要 The voltage generation circuit having a standard voltage generation circuit, a reference voltage, a minimum voltage setting circuit, and a voltage setting circuit that gradually sets voltage by switching a plurality of the gate transistors to switch a combination of resistive elements. The voltage generation circuit includes a differential amplifier that has one input terminal connected to the reference voltage generated by the standard voltage generation circuit and another input terminal connected to the minimum voltage setting circuit. The differential amplifier has an output node showing the result of a difference voltage of the inputs. The voltage generation circuit includes a pump control circuit that outputs a control signal controlling a charge-pump motion, based on the differential voltage, and a charge pump circuit that sets up and outputs the voltage by the control signal.
申请公布号 US8125264(B2) 申请公布日期 2012.02.28
申请号 US201113050186 申请日期 2011.03.17
申请人 MAEJIMA HIROSHI;KABUSHIKI KAISHA TOSHIBA 发明人 MAEJIMA HIROSHI
分类号 G05F1/10 主分类号 G05F1/10
代理机构 代理人
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