发明名称 |
Method, system, and apparatus for adjacent-symbol error correction and detection code |
摘要 |
A circuit and method for generating an Error Correcting Code (ECC) based on an adjacent symbol codeword that is formed in two clock phases. In an embodiment, a set of m bits of a first symbol and a set of m bits of a second symbol from a first set of data for transmission over a channel during a first clock phase are generated. A set of n bits of the first symbol and a set of n bits of the second symbol from a second set of data over a channel are also generated during a second clock phase. Other embodiments are also claimed and/or disclosed. |
申请公布号 |
US8127213(B2) |
申请公布日期 |
2012.02.28 |
申请号 |
US20070968148 |
申请日期 |
2007.12.31 |
申请人 |
HOLMAN THOMAS;INTEL CORPORATION |
发明人 |
HOLMAN THOMAS |
分类号 |
H03M13/00;G06F11/00;G06F11/10 |
主分类号 |
H03M13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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