发明名称 Reconfigurable filter node for an adaptive computing machine
摘要 A reconfigurable filter node including an input data memory adapted to store a plurality of input data values, a filter coefficient memory adapted to store a plurality of filter coefficient values, and a plurality of computational units adapted to simultaneously compute filter data values. Filter data values are the outputs of a filter in response to input data values or a second plurality of filter coefficients to be used in subsequent filter data value computations. First and second input data registers load successive input data values input data memory or from adjacent computational units. Each computational unit comprises a pre-adder adapted to output either the sum two input data values stored in the computational unit or alternately to output a single input data value, and a multiply-and-accumulate unit adapted to multiply the output of the pre-adder by a filter coefficient and accumulate the result.
申请公布号 US8126949(B1) 申请公布日期 2012.02.28
申请号 US20070952998 申请日期 2007.12.07
申请人 SCHEUERMANN W. JAMES;FROST, III OTIS LAMONT;NVIDIA CORPORATION 发明人 SCHEUERMANN W. JAMES;FROST, III OTIS LAMONT
分类号 G06F17/10;H03H17/02;H03H21/00 主分类号 G06F17/10
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