| 摘要 |
FIELD: information technology. ^ SUBSTANCE: data transmission system has a processor connected to a memory unit, a control device with a connected firmware storage device, an address unit, a clock pulse generator and a buffer storage, the output of which is the input/output of the system. The storage is connected by a two-way line to the memory unit and is connected by the clock input to the clock output of the control device. The setting input of control device is merged with the setting input of the address unit and is connected to the output of the processor. The interrupt input of the processor is connected to the signal output of the control device, the control output of which is connected to the input of the clock pulse generator. The outputs of the clock pulse generator are connected to the clock inputs of the processor, the address unit and the control device. The counter output and the signal input of the control device are respectively connected to the counter input and the signal output of the address unit, the output of which is connected to the address input of the memory unit. ^ EFFECT: broader functionalities by providing an exchange with access to the memory unit with which the processor operates, which significantly simplifies programming and saves time resources of the processor. ^ 5 cl, 5 dwg |
