| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an output circuit that suppresses an output signal delay to minimize an increase of current consumption. <P>SOLUTION: The output circuit comprises: a differential amplifier circuit that includes a differential input stage 110 to which a differential voltage between an input terminal 101 and an output terminal 102 is applied; first and second current mirrors 130 and 140 connected to first and second power supply terminals VDD and VSS, respectively; a first connection circuit 150 L connected between inputs of the first and second current mirrors; a second connection circuit 150R connected between outputs of the first and second current mirrors; an output amplifier circuit that includes a first transistor 121 of a first conductivity type and a second transistor 122 of a second conductivity type; and a control circuit 160 that includes a third transistor 161 of the first conductivity type that receives a bias signal according to a voltage of a third power supply terminal VML to which a voltage between power supply voltages on the first and the second power supply terminals VDD and VSS is supplied. <P>COPYRIGHT: (C)2012,JPO&INPIT |
