| 发明名称 |
DATA PROCESSOR |
| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a data processor that is reset based on a received signal. <P>SOLUTION: A reception circuit 10D receives a signal. A function processing part 40D processes a signal received by a reception circuit 10D. A monitor circuit 20D outputs a reset release state of a reset signal when predetermined data patterns are continuously extracted by a predetermined number from a signal received by the reception circuit 10D. A reset control circuit 30D reset-releases the reception circuit 10D based on the reset-release state of the reset signal. <P>COPYRIGHT: (C)2012,JPO&INPIT |
| 申请公布号 |
JP2012039575(A) |
申请公布日期 |
2012.02.23 |
| 申请号 |
JP20100180539 |
申请日期 |
2010.08.11 |
| 申请人 |
FUJITSU ADVANCED ENGINEERING LTD |
发明人 |
ICHIZUKA HIROYUKI;KUNIHIRO YUKIO;TAKAYAMA HIROSHI |
| 分类号 |
H04L29/14;H04L1/08;H04N1/00 |
主分类号 |
H04L29/14 |
| 代理机构 |
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代理人 |
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| 主权项 |
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