发明名称 |
DATA-AWARE DYNAMIC SUPPLY RANDOM ACCESS MEMORY |
摘要 |
A Random Access Memory (RAM) with a plurality of cells is provided. In an embodiment, the cells of a same column are coupled to a same pair of bit-lines and are associated to a same power controller. Each cell has two inverters; the power controller has two power-switches. For the cells of the same column, the two power-switches respectively perform independent supply voltage controls for the two inverters in each cell according to data-in voltages of the bit-lines during Write operation. |
申请公布号 |
US2012044779(A1) |
申请公布日期 |
2012.02.23 |
申请号 |
US201113009240 |
申请日期 |
2011.01.19 |
申请人 |
CHUANG CHING-TE;YANG HAO-I;LIN YI-WEI;HWANG WEI;SHIH WEI-CHIANG;CHEN CHIA-CHENG;NATIONAL CHIAO TUNG UNIVERSITY;FARADAY TECHNOLOGY CORPORATION |
发明人 |
CHUANG CHING-TE;YANG HAO-I;LIN YI-WEI;HWANG WEI;SHIH WEI-CHIANG;CHEN CHIA-CHENG |
分类号 |
G11C5/14 |
主分类号 |
G11C5/14 |
代理机构 |
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代理人 |
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地址 |
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