INVERTER

摘要

In an inverter of this invention, each of a plurality of arms (A) comprises a normally-ON element (P) and an N-channel MOS transistor (Q) connected in series. The ratio between a threshold voltage value (VTH) for the N-channel MOS transistors (Q) and amplitude voltage (VA) of control signals (f1-f6) is set such that two arms connected in series (A1 and A4, A2 and A5, or A3 and A6) will not become an ON-state simultaneously. Therefore, flow-through currents can be reduced with a simple construction, without installing timing adjustment circuits separately.